Summary
Highly motivated Computer Engineer with 6 years of experience in designing, developing, and optimizing complex hardware and software systems. Proven expertise in full-stack embedded system development, from initial concept to deployment, with a strong focus on performance and reliability. Adept at bridging the gap between hardware and software to deliver innovative solutions in fast-paced technology environments.
Experience
- Led the design and verification of critical IP blocks for next-generation GPU architectures, reducing simulation time by 25%.
- Optimized embedded firmware for a new inference engine, improving performance by 15% and reducing memory footprint by 10%.
- Collaborated with cross-functional teams to integrate hardware and software components, successfully bringing 2 new products to market ahead of schedule.
- Developed automated test benches in SystemVerilog, identifying and resolving over 50 complex hardware bugs pre-silicon.
- Designed and implemented firmware for embedded controllers in server platforms, reducing boot-up time by 200ms across product lines.
- Developed diagnostic tools in Python for hardware validation, decreasing debug cycles by 30% for new silicon.
- Contributed to the architectural definition of power management units, achieving a 15% reduction in idle power consumption.
- Performed extensive hardware/software integration testing, ensuring 99.9% reliability for critical system functions.
Projects
- Implemented AES-256 encryption algorithm on a Xilinx Kintex-7 FPGA, achieving a throughput of 10 Gbps, a 5x improvement over software-only solutions.
- Developed a custom AXI interface for seamless integration with embedded processors, enabling real-time data processing.
- Optimized resource utilization, using less than 60% of available FPGA logic cells and BRAMs.
- Designed and implemented a lightweight Real-Time Operating System (RTOS) kernel for ARM Cortex-M microcontrollers, specifically for low-power IoT applications.
- Integrated essential features including task scheduling, inter-process communication (IPC), and memory management, demonstrating robust performance.
- Achieved a boot time of under 50ms and a memory footprint of less than 8KB, ideal for resource-constrained devices.
- Developed a Python-based automation script and custom hardware interface for rapid testing of newly manufactured PCBs, reducing test time by 40%.
- Integrated with standard lab equipment (multimeter, power supply, oscilloscope) via GPIB/USB, enhancing testing accuracy and repeatability.
- Reduced human error in testing procedures, leading to a 15% decrease in re-test rates for production units.
Education
- Specialized in VLSI Design and Embedded Systems, maintaining a 3.9 GPA.
- Researched novel low-power CPU architectures, resulting in a published conference paper.
- Awarded the Dean's Fellowship for academic excellence and research potential.
- Graduated Summa Cum Laude with a 3.85 GPA.
- Developed an FPGA-based image processing accelerator for a senior design project, achieving a 3x speedup.
- Member of Eta Kappa Nu (Electrical Engineering Honor Society).

